Processor Architecture Design Practices: survey & Issues
نویسندگان
چکیده
The paper explores the recent architecture evaluations and related issues and compares NISC (No Instruction Set Computer) features to those of CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer) processors. It has been observed that the complexities with embedded systems have increased manifold and the design community has been searching a suitable method that can handle such complexities with dual aims of (i) increased efficiency and (ii) reduction in time to introduce the product in the market that increase designer productivity without sacrificing the design quality. The paper presents a review of different processors and compares the variation in their utility and design Keywords—CISC, NISC, RISC, ASIP, HLS, Micro Program Memory (mPM).
منابع مشابه
Survey of the Counterflow Pipeline Processor Architectures
11. T H E ORIGINAL CFPP Abstract The Counterflow Pipeline Processor (CFPP) Architecture is a RISC-based pipeline processor [ l I. I t was proposed in 1994 as asynchronous processor architecture. Recently, researches have implemented it as synchronous processor architecture and later improved its design in terms of speed and performance by reducing average execution latency of instructions and m...
متن کاملUltra-Low-Energy DSP Processor Design for Many-Core Parallel Applications
Background and Objectives: Digital signal processors are widely used in energy constrained applications in which battery lifetime is a critical concern. Accordingly, designing ultra-low-energy processors is a major concern. In this work and in the first step, we propose a sub-threshold DSP processor. Methods: As our baseline architecture, we use a modified version of an existing ultra-low-power...
متن کاملDesign and Implementation of Field Programmable Gate Array Based Baseband Processor for Passive Radio Frequency Identification Tag (TECHNICAL NOTE)
In this paper, an Ultra High Frequency (UHF) base band processor for a passive tag is presented. It proposes a Radio Frequency Identification (RFID) tag digital base band architecture which is compatible with the EPC C C2/ISO18000-6B protocol. Several design approaches such as clock gating technique, clock strobe design and clock management are used. In order to reduce the area Decimal Matrix C...
متن کاملIntroduction to Multiprocessor I/o Architecture
The computational performance of multiprocessors continues to improve by leaps and bounds fueled in part by rapid improvements in processor and interconnection technology I O performance thus becomes ever more critical to avoid becoming the bottleneck of system performance In this paper we provide an introduction to I O architectural issues in multiprocessors with a focus on disk subsystems Whi...
متن کاملEmbedded Software in Real-Time Signal Processing Systems: Design Technologies - Proceedings of the IEEE
The increasing use of embedded software, often implemented on a core processor in a single-chip system, is a clear trend in the telecommunications, multimedia, and consumer electronics industries. A companion paper in this issue [1] presents a survey of application and architecture trends for embedded systems in these growth markets. However, the lack of suitable design technology remains a sig...
متن کامل